Commission, October 14, 2015, No M.7688

Dear Sir/Madam,

Subject: Case M.7688 - Intel/ Altera

Commission decision pursuant to Article 6(1)(b) of Council Regulation No 139/2004 (1) and Article 57 of the Agreement on the European Economic Area (2)

(1)     On 9 September 2015, the Commission received a notification of a proposed concentration pursuant to Article 4 of Council Regulation (EC) No 139/2004 (1) by which Intel Corporation (“Intel” or the “Notifying Party”, USA) acquires within the meaning of Article 3(1)(b) of the Merger Regulation control of Altera Corporation (“Altera”, USA) by way of purchase of shares (the “proposed transaction”). (3) Intel and Altera together are referred to hereinafter as the “Parties”.

1. THE PARTIES

(2)     Intel designs and manufactures computing and communications components, such as microprocessors (also known as central processing units, “CPUs”), chipsets, motherboards, and wireless and wired connectivity products, as well as platforms that incorporate these components. Intel also develops and sells software and services primarily focused on security and technology integration. Intel recently began offering to third parties semiconductor contract manufacturing, often  referred to as foundry services.

(3)     Altera designs and sells a variety of semiconductor products, including programmable logic devices (“PLDs”), a product category that includes both field programmable gate arrays (“FPGAs”) and complex programmable logic devices (“CPLDs”); highly integrated power devices, known as power system-on-chip devices; pre-defined design building blocks, known as intellectual property cores; and proprietary development software.

2. THE CONCENTRATION

(4)     Pursuant to the Agreement and Plan of Merger entered into between the Parties on 31 May 2015, a wholly owned subsidiary of Intel established for the purpose of the proposed transaction, will merge with and into Altera, with Altera to be the surviving entity. As a result of the proposed transaction, Intel will therefore  exercise sole control over Altera.

(5)     The proposed transaction therefore constitutes a concentration within the meaning of Article 3(1)(b) of the Merger Regulation.

3. EU DIMENSION

(6)     The undertakings concerned have a combined aggregate world-wide turnover of more than EUR 5 000 million (Intel: EUR 42 055 million; Altera: EUR 1 489 million). Each of them has an EU-wide turnover in excess of EUR 250 million (Intel: EUR […] million; Altera: EUR […] million), but they do not achieve more than two-thirds of their aggregate EU-wide turnover within one and the same Member State.

(7)     The proposed transaction therefore has an EU dimension under Article 1(2) of the Merger Regulation.

4. RELEVANT MARKETS

(8)     The proposed transaction concerns the design and sale of semiconductor devices, in which both Parties are active.

(9)     Semiconductors are materials, such as silicon, which can act as an insulator, but are also capable of conducting electricity. Semiconductors are at the heart of devices such as diodes, transistors and other electronic components, and can be found in virtually every electronic device today. The end-products that contain semiconductor devices range from base stations, mobile phones, computers, domestic appliances and cars to medical equipment, identification systems, large- scale industry electronics and aerospace equipment. Semiconductor devices are rarely bought as end-products by consumers. They are mainly bought by equipment manufacturers in virtually all sectors within the electronic equipment industry.

(10)    The proposed transaction does not give rise to any horizontal relationships, as Intel and Altera's semiconductor devices are not substitutable with one another.

(11)    However, given that many semiconductor suppliers (including those supplying FPGAs and CPLDs) rely on external semiconductor contract manufacturers, the proposed transaction gives rise to a vertical relationship between the contract manufacture of semiconductors (in which Intel is active) and the supply of FPGAs and CPLDs (in which Altera is active).

(12)    Finally, CPUs and FPGAs can be used in some cases in the same applications. In most of the cases, the functions they perform in those applications are distinct and not interchangeable. However, for some applications, such as, in particular, servers in data centres, where FPGAs can be interconnected with CPUs to  accelerate certain tasks normally performed by a CPU ("so-called workload acceleration"), (4) those functions are complementary. Therefore, the proposed transaction also gives rise to a conglomerate relationship between the supply of CPUs (in which Intel is active) and the supply of FPGAs (in which Altera is active). The main application in which both CPUs and FPGAs can be used, and the most relevant one for the purposes of the competitive assessment of the proposed transaction, is workload acceleration in servers. (5)

(13)    In light of the above, the Commission will examine the relevant market definition  in relation to the following product areas: (i) manufacturing of CPUs; (ii) supply of CPLDs; (iii) supply of FPGAs; and (iv) contract manufacturing of semiconductors.

4.1. Microprocessors (CPUs)

4.1.1. Product market definition

(14)    Microprocessors or CPUs operate as the “brains” of computer systems. Typical microprocessor operations include adding, subtracting, comparing two numbers, and fetching numbers from memory, as well as transferring information to and  from other system resources, typically via data transfer paths called “buses”.

(15)    Intel’s CPUs are based on x86 architecture (6) and designed for notebooks, netbooks, desktops, servers, workstations, storage products, embedded applications (e.g. industrial machinery), communications products (e.g. routers and switches), consumer electronics and handhelds devices.

(16)    In its 2009 Intel antitrust decision, (7) the Commission found that CPUs based on the x86  architecture  ("x86  CPUs")  and  CPUs  not  based  on  the  x86 architecture constituted two distinct product markets. In the same decision, the Commission left open whether the relevant product market for x86 CPUs included x86 CPUs for all computers (desktops, laptops and servers), or whether a further distinction should be made between (i) x86 CPUs for desktops, (ii) x86 CPUs for laptops, and (iii)  x86 CPUs for servers. The Commission took the same view in its Intel/McAfee decision. (8)

4.1.1.1.       The Notifying Party’s view

(17)    The Notifying Party submits that the Commission's market definition in its Intel  and Intel/McAfee decisions relied to a substantial extent on the fact that Microsoft’s Windows operating system only supported CPUs based on the x86 architecture and on network effects resulting from Windows compatibility with Intel's x86 CPUs. However, according to the Notifying Party, architecture-based competition has increased since the Commission's decisions and, today, x86 CPUs also face competition   from   CPUs   based   on   other   architectures, such as the ARM architecture (9) ("ARM-based CPUs"). In particular, ARM-based CPUs are also used in servers, which is the only computer segment where Intel is present in which FPGAs may be used. The Notifying Party points out that Microsoft is reportedly developing a Windows version for the ARM architecture.

(18)    The Notifying Party believes that the relevant product market definition for CPUs can be left open, because the proposed transaction does not give rise to competition concerns, regardless of whether the relevant market covers all CPUs (irrespective of the architecture used and the device into which they are incorporated) or only a segment thereof (e.g. x86 CPUs, CPUs for a particular device or x86 CPUs for a particular device).

4.1.1.2.The results of the market investigation and the Commission’s assessment

(19)    As regards a possible segmentation of CPUs according to the type of the device  into which they are incorporated (i.e. servers, desktops, notebooks, wired and wireless communications), most of the respondents to the market investigation carried out in the present case took the view that segmentation on this basis could indeed be justified. (10)

(20)    In particular, most customers and competitors indicated that CPUs for the different types of devices are differentiated in terms of price, functionality, performance, power, architecture extensions and flexibility. (11) Market participants explained that the importance attached to CPUs varies according to the type of device at issue. For example, CPUs for notebooks prioritize energy efficiency to meet computation requirements within battery life or data centre power budgets, whereas CPUs for desktops prioritize reliability, availability, serviceability and manageability capabilities to meet the requirements. Moreover, most of the respondents stated that CPUs for the server space differ from other CPUs since they have functionalities that include a different number of CPU cores, larger caches and differences in  terms of frequencies, memory, input-output ("IO") expandability, footprints and power.

(21)    As regards a possible segmentation of CPUs according to the architecture used, the market investigation expressed mixed views as to whether ARM-based CPUs, Power (12) architecture-based CPUs, MIPS (13) architecture-based CPUs, SPARC (14) architecture-based CPUs and General-purpose computing on graphics processing units ("GP-GPU") might become an alternative choice for x86 CPUs in the future for certain type of devices. (15) On the one hand, as regards wired, wireless, consumer electronics and industrial devices, respondents submitted that there is a certain degree of substitutability between different architectures. (16) On the other hand, as regards servers, notebooks and desktops, respondents indicated that substitutability of the x86 architecture with other architectures is limited. This is due, in particular, to the fact that software for servers, desktops and notebooks generally requires the presence of at least one x86 CPU. (17) Moreover, this seems to be supported by the  fact that, in 2014, the volume of x86 CPUs sold accounted for the large majority of CPUs for, respectively, servers, notebooks (18)  and desktops. (19)

(22)    In sum, the results of the market investigation suggest that it may be appropriate to segment the market for CPUs according the type of the device into which they are incorporated (e.g. servers, desktops, laptops). The market investigation expressed mixed views as to whether a segmentation according to the architecture used (e.g. the x86 architecture) would be appropriate for all types of end devices. However, for the purposes of the present decision, the precise product market definition can be left open, as the proposed transaction does not raise serious doubts as to its compatibility with  the  internal  market  as  regards  CPUs  even  on  the narrowest possible product market definition, namely x86 CPUs per type of device in which the CPU is installed (x86 CPUs for servers, x86 CPUs for desktops and x86 CPUs for laptops).

4.1.2. Geographic market definition

(23)    In its 2009 Intel antitrust decision, (20) the Commission indicated that the geographic dimension of the markets for x86 CPUs should be considered worldwide. This conclusion was supported by the fact that the main suppliers compete globally, CPU architectures are the same across the world, the main customers, in particular the Original Equipment Manufacturers ("OEMs"), operate on a worldwide basis, and the cost of shipping CPUs around the world is low compared to their cost of manufacture. The Commission took the same view in its Intel/McAfee decision. (21)

(24)    The market investigation confirms the Notifying Party's point of view that the relevant geographic market for x86 CPUs are indeed worldwide. This is true regardless of how the product market is defined. In particular, respondents confirmed that cost of shipping is low compared to the cost of manufacture, the products offered are based on similar architecture, the operators compete globally and the main customers operate on a global basis. (22)

(25)    The Commission therefore concludes that the relevant market for CPUs (and possible segments thereof) is worldwide in scope.

4.2. Programmable logic devices (PLDs), including complex programmable logic devices (CPLDs) and field programmable gate arrays (FPGAs)

4.2.1. Product market definition

(26)    Programmable logic devices (PLDs) are standard, off-the-shelf parts that offer customers a wide range of logic capacity, features, speed, and voltage characteristics. These devices can be configured at any time to perform any number of functions. With programmable logic devices, designers use inexpensive software tools to quickly develop, simulate, and test their designs. Then, a design can be quickly programmed into a device, and immediately tested in a live circuit.

(27)    The term "PLDs" designates a product category that includes both field programmable gate arrays (“FPGAs”) and complex programmable logic devices (“CPLDs”).

(28)    FPGAs are digital semiconductor devices that can be configured by customers (such as cloud service providers) after fabrication to perform desired logic and processing  functions. (23)   For  certain  computing  tasks,  specialised  programmable hardware (such as FPGAs) may have performance advantages over software running on a general purpose CPU (such as x86 CPUs).

(29)    CPLDs are integrated circuits, the contents of which may be configured by customers. CPLDs are used primarily as “glue logic” to interface with other integrated circuits in a system. In addition, CPLDs are programmed electrically and maintain their configuration when powered off.

(30)    Third-party industry reports, such as those prepared by Gartner, refer to PLDs as a whole and do not provide separate figures for FPGAs and CPLDs.

(31)    The following sections examine whether a distinction should be drawn between FPGAs and CPLDs for market definition purposes and the scope of the relevant product markets.

4.2.1.1. The Notifying Party’s view

(32)    The Notifying Party submits that, although CPLDs are similar to FPGAs since both types of products are configurable by customers, they also differ from each other in several aspects. In particular, according to the Notifying Party, CPLDs and FPGAs are based on different architectural features and are used in different applications. First, CPLDs support more limited logic functions than FPGAs, as CPLDs only support an elementary processing function in a digital circuit. Second, CPLDs use non-volatile memory, while FPGAs use volatile memory. (24) Third, FPGAs are generally much larger in size than CPLDs. FPGAs may contain hundreds of thousands of logic elements (the smallest configurable unit of an FPGA), while CPLDs typically have less than 2,000. In addition, since FPGAs are typically used for more complex applications, prices for FPGAs are generally significantly higher than prices  for CPLDs.  Finally,  since  FPGA designs are far more complex than CPLD designs, a CPLD supplier could not switch to designing FPGAs in the short term without incurring significant development costs or risks.

(33)    As regards specifically FPGAs, the Notifying Party submits that, traditionally, device or system manufacturers have relied upon so-called Application-specific integrated circuits ("ASICs") (25) or Application-specific standard products ("ASSPs") (26) as an alternative to FPGAs to handle workloads that benefit from the use of dedicated hardware. According to the Notifying Party, device or system manufacturers rely on FPGAs in particular for low-volume products in respect of which the cost of developing an ASIC or an ASSP would be prohibitive.  In addition to entailing cost savings, FPGAs also offer a time-to-market advantage because they can be configured in less time than required to design an ASIC or an ASSP. The Notifying Party submits that there are several main differences between PLDs (including FPGAs), ASICs and ASSPs, as summarised in the table below.

(34)    The Notifying Party also argues that the proposed transaction is unlikely to have a material impact on ASIC and ASSP vendors. Although there is a trend towards an increased use of FPGAs as compared to ASICs and ASSPs, this trend is independent of the proposed transaction.

(35)    The Notifying Party further submits that FPGAs can be segmented by performance characteristics into high-end, mid-range and low-cost devices, depending on their features, capacity and performance. High-end FPGAs are developed for high performance purposes. Low-cost FPGAs are developed for low cost, low complexity and low power consumption per chip. Mid-range FPGAs provide a solution between the above two and are developed as a balance between cost and performance.

(36)    The different performance characteristics are also related to the manufacturing process used. While high-end FPGAs are manufactured using advanced manufacturing processes (and therefore typically have greater performance and capacity), there is a tendency to manufacture low-cost FPGAs using older manufacturing processes. (27) In any event, according to the Notifying Party, it is not necessary to define the FPGA market more narrowly based on the above segments.

(37)    As described in recital (10), the main application for which FPGAs can be used in conjunction with an x86 CPU is workload acceleration in servers. With specific regard to this application, the Notifying Party states that it is technically more efficient to perform computational workload on hardware instead of software but that, due to the higher cost of hardware, the workload performed on hardware would have to be repetitive and run on a large number of platforms in order for it to be economically efficient to invest in hardware.

(38)    Recently, cloud service providers ("CSPs") started to test the use of FPGAs for workload acceleration in servers to accelerate the performance of certain algorithms (such as for instance algorithms of search engines) on server platforms. In order to do so, FPGAs are installed on an add-in board and are connected to the CPU in the server through the so-called Peripheral component interconnect express ("PCIe"). (28) An illustration of how CPU and FPGA interact is provided below as Figure 1.

(39)    According to the Notifying Party, workload acceleration in servers is expected to be the main application for a combination of FPGAs and CPUs. The Notifying Party submits that Intel plans to develop integrated CPU/FPGA products which will bring substantial benefits both in terms of price and performance. However, according to  the Notifying Party, this does not justify defining a separate market for FPGAs for workload acceleration. Workload acceleration rather relates to a function that FPGAs can perform in an area where CPUs and FPGAs are used as complementary products.

4.2.1.2. The results of the market investigation and the Commission's assessment

(40)    Most of the customers and competitors who replied to the market investigation agreed that FPGAs and CPLDs are not interchangeable, (29) essentially because of their different functionalities and characteristics (with FPGAs offering higher performance), different categories of users targeted and significantly different architectures.  In particular, CPLDs have lower computational capabilities and speed. CPLDs are also more complex and offer a lower degree of configurability to customers. Only two customers consider that CPLDs and FPGAs are interchangeable to a certain degree, but they also acknowledge that CPLDs would provide a lower quality solution. (30)

(41)    In light of the results of the market investigation and for the purposes of this decision, the Commission concludes that CPLDs constitute a stand-alone product market separate from the product market for FPGAs.

(42)    As regards FPGAs, the definition of the relevant market raises two additional issues, namely: (1) whether products that have traditionally been used as alternatives to FPGAs (that is, ASICs and ASSPs) should be considered to be part of the same market as FPGAs; and (2) whether further segmentations should be made between different types of FPGAs. These issues will be addressed in turn below.

(43)    With respect to the substitutability between FPGAs, ASICs and ASSPs,  respondents to the market investigation expressed mixed views. (31)  While most of  the respondents agreed with the Notifying party's submission that FPGAs could be considered an alternative to ASICs and ASSPs for low-volume products, they also acknowledged key differences between those products. First, FPGAs are characterized by a higher degree of customer configurability. FPGA customers have the ability to customize the functionality of the FPGA to meet their needs using advanced high performance software rather than the time consuming and cost intensive design process needed to create a semiconductor from beginning to end. Second, FPGAs usually involve less time-to-market, lower fixed costs and higher variable costs. For companies with sufficient financial and technical resources and higher volume requirements, ASICs and ASSPs generally exhibit a significant performance advantage compared to FPGAs. Finally, some customers who replied to the market investigation acknowledged that the use of FPGAs in place of ASICs and ASSPs may increase in the future if the cost of developing ASICs and ASSPs becomes prohibitive. (32)

(44)    Overall, from a demand-side perspective, it appears that FPGAs, ASICs and ASSPs target different customer segments as they address different customer preferences  in terms of price, performance, configurability and time to market. From a supply- side perspective, there appears to be high barriers to entry into the FPGA market due to the significant number of patents needed and the time and cost to develop tools and IP required in the manufacturing process. These elements indicate that FPGAs should be considered separately from both ASICs and ASSPs for the purposes of defining the relevant product market.

(45)    With respect to different types of FPGAs, the following possible segmentations within the market for FPGAs are considered below: (i) a segmentation on the basis of performance characteristics (i.e., between high-end, mid-range and low-cost devices; (ii) a segmentation on the basis of the type of device into which FPGAs  are installed (i.e., between desktops, laptops and servers); and, (iii) within the segment for FPGAs for servers, a further segmentation on the basis of the intended use of the FPGAs.

(46)    As regards a possible segmentation of FPGAs on the basis of performance characteristics, most of the respondents to the market investigation took the view that FPGAs could indeed be further segmented on this basis into three groups, namely high-end, mid-range and low-cost FPGAs. (33) In the view of some respondents,   it   is   widely   accepted   in   the   industry   that   different customer applications require different capabilities within the FPGA roadmap and customers decide which FPGA to use based on their own use model. According to another respondent, high-end FPGAs are programmable to complete tasks that low-cost FPGAs are unable to perform. This difference in performance levels also translates into different prices. The price of low-cost FPGAs is expected not to exceed $50, the price of mid-range FPGAs is estimated to be around $200 and that of   high-end FPGAs is expected to range from $1 000 to over $6 000. (34)

(47)    The segmentation of FPGA by performance characteristics is also reflected in the different process nodes used. Respondents to the market investigation confirmed that smaller process nodes are generally used for more complex and higher cost products. In particular, high-end FPGAs are manufactured using process nodes below 20 nm, mid-range FPGAs are manufactured based on process nodes of between 20 and 40 nm, while low-cost FPGAs are manufactured at over 40 nm nodes. (35)

(48)    As regards a possible segmentation of FPGAs according to the type of devices into which they are incorporated (i.e., desktops, laptops or servers), the market investigation provided mixed results. Almost half of the respondents stated that  they do not have sufficient knowledge on this point. Only a small majority of respondents submitted that such segmentation would be appropriate, though limited to specific devices only. In the server space, where Intel plans to combine FPGAs and CPUs, Xilinx, Altera’s largest competitor, considers that any of its different FPGA products can be used for this purpose. Customers' choice of which FPGA to use is not driven by the type of devices into which FPGAs have to be incorporated, but rather by the performance required for the customers' particular application. (36)

(49)    As regards a possible further segmentation of FPGAs for servers according to their intended use, the majority of respondents to the market investigation considered that FPGAs for servers should not be distinguished according to their intended use, i.e. (i) computing; (ii) networking; and (iii) storage. (37) Such distinction would not be appropriate because FPGAs are generic, programmable logic devices that can serve all three purposes. Nevertheless, some respondents, submitted that FPGAs intended for computing, networking and storage have different engineering specifications, performance power and price requirements and should therefore be considered separately. (38)

(50)    Within computing, a particular intended use is workload acceleration, where FPGAs  are beginning to  be used alongside microprocessors as co-processors or accelerators in some CSPs’ data centres. In this regard, most of the respondents submitted that all kinds of FPGAs can be used for the purpose of workload acceleration in servers and a segmentation on the basis of performance characteristics is not required. (39) However, one respondent explained that the choice of a specific FPGA depends on the specific function it is required to accelerate.  As such, even if, in principle, it would be possible to use all FPGAs to perform workload acceleration, in practice, if a specific function requires the use of a high- end FPGA for technical reasons, then the use of other types of FPGAs would not  be appropriate. Along similar lines, another respondent submitted that, by way of example, a high-end FPGA would typically be used for applications that require 25G Ethernet, while a mid-range FPGA would be sufficient for applications such  as image recognition. (40)

(51)    In addition, the market investigation indicated that there are further solutions in the market other than FPGAs that may be used in workload acceleration for servers. (41) In particular, several respondents regarded ASSPs, ASICs and GP-GPUs as alternative solutions to FPGAs in the server space, (42) as all three products can be used for workload acceleration purposes. According to one respondent, FPGAs are more flexible and programmable, although other products may provide greater speed and power. Another respondent submitted that the degree of substitutability of ASICs and ASSPs with FPGAs in the data centre environment depends on whether the user wants or needs the algorithm programmed in the FPGA to change. If such changes are not needed, then ASICs and ASSPs are a feasible alternative. However, given the rate at which workloads are changing in the data centre environment, the possibility to program FPGAs is typically more desirable. Most of the respondents also confirmed that GP-GPUs are already today used for workload acceleration in high performance computing applications.

(52)    In sum, the results of the market investigation indicate that it may be appropriate to further segment the market for FPGAs by performance characteristics into high- end, mid-range and low-cost FPGAs. By contrast, the market investigation yielded mixed views in relation to a possible segmentation according the type of device  into which FPGAs are incorporated and/or according to the intended use (such as, for example, workload acceleration for servers).

(53)    For the purpose of the present decision, the Commission concludes that there are separate product markets for FPGAs and for CPLDs. However, it can be left open whether the FPGA market should be further segmented according to performance characteristics, the type of the device into which FPGAs are incorporated and/or  the intended use, as the proposed transaction does not raise serious doubts as to its compatibility  with  the  internal  market  even  on  the  narrowest  possible product market (namely FPGAs of different performance characteristics used for workload acceleration in servers).

4.2.1.3.  Geographic market definition

(54)    In previous cases, the Commission considered that the geographic scope of semiconductor markets may be at least EEA-wide, if not worldwide, although the precise scope of the geographic market was ultimately left open. (43)

(55)    The Notifying Party submits that the relevant geographic markets for both FPGAs and CPLDs is worldwide in scope, in light of the fact that (i) the main companies active in this sector operate on a global scale; (ii) products and architectures are the same around the world; (iii) many customers operate on a worldwide basis; and (iv) the costs of shipping around the world are low compared to manufacturing costs.

(56)    Most of the respondents to the market investigation considered the geographic scope of both the FPGA and the CPLD market to be worldwide. In particular, respondents highlighted that (i) there are no significant differences in pricing, supply or purchasing patterns; (ii) shipping and handling costs are low compared to manufacturing costs; and (iii) suppliers and customers operate on a global basis. (44)

(57)    In light of the results of the market investigation, for the purposes of this decision, the Commission concludes that the relevant geographic markets for FPGAs (and its possible segments) and CPLDs should be considered worldwide in scope.

4.3. Semiconductor contract manufacturing

(58)    Semiconductor contract manufacturers serve the manufacturing needs of “fabless” semiconductor companies – i.e. semiconductor companies that lack their own manufacturing facilities – as well as system manufacturers that design microprocessors or ASICs for use in their platforms. Today, nearly all semiconductor companies are fabless. Fabless semiconductor companies (which include companies such as Qualcomm, Nvidia, or AMD) and system manufacturers (which include companies such as Huawei, Cisco, or Apple) design their own semiconductor products and provide the designs to external manufacturers, which manufacture semiconductor wafers on their behalf in semiconductor manufacturing facilities known as “fabs”.

(59)    External manufacturers are generally referred to as “foundries”. They typically manufacture only semiconductor wafers, which are plate-shaped substrates of silicon that, at the end of the manufacturing process, contain numerous “dies”, which are the foundry customers’ semiconductor chips. Fabs are defined by the diameter of wafers that they are tooled to produce. Wafers may be manufactured  at different manufacturing process nodes expressed in nanometers (such as 16nm, 14nm, etc.). The smaller the process node used, the higher the number of transistors on a single chip and the stronger the performance of the final semiconductor. Customers typically take the manufactured wafers to another set of external suppliers, which assemble the dies into packages with external wiring that can be integrated into the customers’ platforms. Thus, competition among foundries is in the manufacture of wafers for external customers.

(60)    In order to be competitive, providers of contract manufacturing services need a wide range of tools and IP libraries to ensure their ability to implement their customers' design and translate the design into a final product. When choosing their supplier, customers first contact several service providers. Second, customers proceed with an initial evaluation of the providers' technology and ensure that the manufacturing facility has sufficient capabilities to meet their needs. Third, customers negotiate the pricing with the selected providers and finally conclude the relevant agreements.

(61)    Most semiconductor contract manufacturers specialize in manufacturing for other companies and do not develop products that they produce on their own behalf. However, a smaller number of companies, including Samsung and Intel, manufacture both their own products and products on behalf of external customers.

4.3.1. Product market definition

(62)    The Notifying Party submits that, while the narrowest conceivable way of defining the market would be to distinguish between different process nodes, such segmentation would lead to overly narrow markets. In addition, the Notifying Party submits that the market for semiconductor contract manufacturing should not be further segmented by type of semiconductor (e.g. FPGAs, CPLDs, etc.), as all contract manufacturers produce a broad range of semiconductors for a variety of customers. According to the Notifying Party, the only key differentiating factor from a supply-side substitution standpoint is the process node used for manufacturing. In any event, the Notifying Party submits that the exact product market definition can be left open because Intel’s market share is negligible under any conceivable market definition.

(63)    In previous decisions (in the field of State aids), the Commission did not differentiate manufacturing activities according to the different process nodes used. (45)

(64)    In the present decision, the precise scope of the product market can be left open, as the proposed transaction does not raise serious doubts as to its compatibility with the internal market with regard to semiconductor contract manufacturing services even on the narrowest possible product market, namely semiconductor contract manufacturing for all different process nodes.

4.3.2. Geographic market definition

(65)    The Notifying Party submits that the geographic scope of the market for semiconductor contract manufacturing (including its possible sub-segments) is worldwide, in light of the fact that (i) contract manufacturers supply customers from around the world and compete for customers on a global scale; (ii) customers routinely contact other customers to have their products manufactured in other continents; and (iii) the costs of shipping around the world are low compared to manufacturing costs. In particular, the Notifying Party submits that it provides manufacturing services to customers around the world from its the manufacturing facilities in Portland (Oregon, USA) and that Altera's third-party contract manufacturers are all active outside the EEA.

(66)    Therefore, the Notifying Party takes the view that the geographic market for semiconductor contract manufacturing services should also be considered worldwide in scope.

(67)    In previous decisions (in the field of State aid), the Commission found the relevant geographic market to be worldwide in scope. (46)

(68)    In the case at hand, the precise scope of the geographic market as regards semiconductor contract manufacturing can be left open, as the proposed transaction does not raise serious doubts as to its compatibility with the internal market with regard to semiconductor contract manufacturing services irrespective of the precise geographic market definition.

5. COMPETITIVE ASSESSMENT

(69)    As set out in paragraph (10) above, the proposed transaction gives rise to vertical relationships between the contract manufacture of semiconductors (in which Intel  is active) and the supply of FPGAs and CPLDs (in which Altera is active). In addition, the proposed transaction gives rise to a conglomerate relationship between the supply of CPUs (in which Intel is active) and the supply of FPGAs (in which Altera is active). The vertical and conglomerate relationships created by the proposed transaction will be assessed in detail in the present section.

(70)    In particular, Section 5.1. sets out the market shares of the Parties and their competitors in the relevant markets and, where appropriate, their potential  segments identified in Section 4 above. On this basis, Section 5.2. identifies the relevant markets affected by the proposed transaction, i.e. those markets where the market shares of one or both of the Parties are equal to or above 30%. Section 5.3. and Section 5.4. assess the impact of the proposed transaction on competition in the affected markets from a vertical and from a conglomerate perspective, respectively.

5.1. Market shares

(71)    This section presents the market shares of the Parties and their competitors in the relevant   markets   identified  in   Section  4,  namely  CPUs  (including     possible

(89)    However, the proposed transaction gives rise to the following vertically affected markets:

·       The downstream market for FPGAs (including its possible sub-segments), where Altera is active (with market shares exceeding 30%), which is vertically linked to the upstream market for semiconductor contract manufacturing services, where Intel is active; and

·       The downstream market for CPLDs, where Altera is active (with market shares exceeding 30%), which is vertically linked to the upstream market for semiconductor contract manufacturing services, where Intel is active.

(90)    In addition, the proposed transaction gives rise to affected markets from a conglomerate perspective. As indicated in paragraph (10) and as explained in further detail in paragraphs (117) to (121) below, for servers in data  centres, FPGAs can be interconnected with CPUs to accelerate certain tasks normally performed by a CPU. The two products are thus complementary. Therefore, as explained in further detail in paragraphs (115) to (122), the market segment for FPGAs of different performance characteristics used for workload acceleration in servers and the market for x86 CPUs for servers (where Intel's market shares exceed 30%) are closely related markets within the meaning of paragraph 91 of the Guidelines on the assessment of non-horizontal mergers under the Council Regulation on the control of concentrations between undertakings ("non-horizontal Guidelines"). (52)

(91)    The Commission will assess the impact of the proposed transaction as regards  those vertical and conglomerate relationships in the following sections.

5.3. Assessment of vertical relationships

(92)    In this section, the Commission assesses the vertical relationships created by the proposed transaction between the upstream market for semiconductor contract manufacturing services (where Intel is active) and the downstream markets for, respectively, the supply of FPGAs and of CPLDs (where Altera is active).

5.3.1. Introduction

(93)    As discussed in Section 4.3 above, companies providing contract manufacturing services are mainly active in the production of wafers which may be manufactured at different process nodes. The subsequent production steps are assembly and testing, which are performed in coordination with the customer through a process of qualification. During this process, customers and contract manufacturers cooperate to guarantee that a specific product meets the customer's quality and reliability criteria as specified in the original design of the product. (53)

(94)    The main differentiating feature between semiconductor contract manufacturers concerns the process node at which they produce the different wafers. Accordingly, even though Intel does not currently provide contract manufacturing services for CPLDs, (54) it would have the manufacturing capability to produce wafers at process nodes which could also be used for the purpose of CPLDs. For this reason, despite the fact that Intel does not provide contract manufacturing services in relation to CPLDs, the Commission has analysed the vertical relationship between the upstream market for contract manufacturing services and the downstream markets for both FPGAs and CPLDs.

(95)    In the upstream market for contract manufacturing services for semiconductors, Intel's market share at a worldwide level was [0-5]% in 2014 in terms of revenue. Intel currently supplies manufacturing services to, among others, Altera (55) and Achronix. (56) Competitors in the market for semiconductor contract manufacturing include the market leader TSMC, with a market share of [50-60]%, and other players such as Global Foundries, UMC, Samsung and SMIC, each with a market share ranging from around [0-5]% to around [5-10]%.

(96)    In the downstream market for the supply of FPGAs, according to the estimates provided by the Notifying Party, Altera's market share in 2014 was [30-40]% in terms of revenues. Altera sells all types of FPGAs, including high-end, mid-range and low-cost FPGAs. The main competitor who also offers the whole range of FPGAs is Xilinx, with a market share of [40-50]% in terms of revenues in 2014. Other competitors include Microsemi and Lattice Semiconductor, with market shares of respectively [5-10]% and [5-10]% in terms of revenues in 2014. Finally, an additional competitor active in the FPGA market is Achronix, a smaller supplier founded in 2004 and the most recent entrant. Altera's and its competitors' market shares for FPGAs do not materially differ in the possible segments of the FPGA market based on performance characteristics, i.e. the segments for high-end, mid- range and low-cost FPGAs. In particular, Altera's market share in each of these segments is between [30-40] and [40-50]%, as set out in Section 5.1.3 above.

(97)    In the downstream market for the supply of CPLDs, according to the estimates provided by the Notifying Party, Altera was the second largest market player in CPLDs in 2014, with a market share of [30-40]% in terms of revenues worldwide. The other main competitors in this market are Lattice Semiconductor, with a revenue-based market share of [50-60]% worldwide and Xilinx with a revenue- based market share of [5-10]%.

5.3.2. Legal framework

(98)    According to the non-horizontal Guidelines, non-coordinated effects may significantly impede effective competition as a result of a non-horizontal merger if such merger gives rise to foreclosure. Foreclosure occurs where actual or potential rivals' access to supplies or markets is hampered or eliminated as a result of the merger, thereby reducing these companies' ability and/or incentive to compete. (57) Such foreclosure may discourage entry or expansion of rivals or encourage their exit. (58)

(99)    The non-horizontal Guidelines distinguish between two forms of foreclosure. Input foreclosure occurs where the merger is likely to raise the costs of downstream  rivals by restricting their access to an important input. Customer foreclosure occurs where the merger is likely to foreclose upstream rivals by restricting their access to a sufficient customer base. (59)

(100)    The Commission investigated whether the proposed transaction is likely to create a risk of input and/or of customer foreclosure. In particular, the Commission examined (i) whether the merged entity would have the ability and incentive post- transaction to foreclose access by other FPGA or CPLD suppliers to the market for semiconductor contract manufacturing services (input    foreclosure); and (ii) whether the merged entity would have the ability and incentive post-transaction to foreclose other semiconductor contract manufacturers from providing their services to Altera as regards FPGAs and/or CPLDs (customer foreclosure).

5.3.3. Input foreclosure

5.3.3.1. The Notifying Party’s view

(101)    The Notifying Party submits that the proposed transaction raises no concerns of input foreclosure in relation to competing suppliers of either FPGAs or CPLDs. In particular, the Notifying Party points out that Intel has only recently entered the upstream market for contract manufacturing services and that there are alternative operators in the market with the necessary technical expertise and fab capacity to meet customers' demand on the downstream markets for the supply of FPGAs and CPLDs.

5.3.3.2.The results of the market investigation and the Commission’s assessment

(102)    Although Intel might theoretically have the ability to terminate the manufacturing agreements it currently has in place with Altera's competitors, including Achronix, (60) it is unlikely that it would have any incentives to do so, given that Intel would need certain volumes to optimise its foundry services and benefit from economies of scale. (61)

(103)    Even assuming that Intel would have both the incentive and the ability to deny Altera's competitors access to its manufacturing services, such foreclosure strategy would be unlikely to have any impact on effective competition in the market, for the following reasons.

(104)    First, as explained above, Intel's market share in the market for contract manufacturing services was below [0-5]% in 2014. Second, even according to the narrowest conceivable market segmentation (i.e. by process technology), Intel's market share for the 22/20 nm process technology was only [0-5]% in 2014. (62) Third, even irrespective of the proposed transaction, […]. Finally, the proposed transaction would also not have an impact on Xilinx, Altera's main competitor in the supply of FPGAs. Xilinx currently cooperates with TSMC, the worldwide market leader in the provision of semiconductor contract manufacturing services. The partnership is also focused on product innovation with the two companies already working on the production of FPGAs at the 7nm process node. (63)

(105)    Moreover, several competitors with much higher market shares than Intel are currently present on the market for contract manufacturing services. These competitors include TSMC, with a market share of [50-60]% in terms of revenues, Global Foundries with [5-10]%, UMC with [5-10]% and Samsung with [5-10]%. These competitors have the required technical expertise to provide similar services to those provided by Intel to Altera's competitors. In particular, TSMC announced that it is manufacturing products on its 16nm process, which it claims is  comparable to other companies’ 14nm process. (64) Global Foundries also stated that it offers contract manufacturing services at the 14nm node. (65)

(106)    In addition, none of the competitors and customers who replied to the market investigation raised concerns of possible input foreclosure by Intel after the proposed transaction.

(107)    For the reasons set out above, the proposed transaction is unlikely to give rise to input foreclosure in relation to the provision of contract manufacturing services to Altera's competitors in the downstream markets for the supply of FPGAs and of CPLDs.

5.3.4. Customer foreclosure

5.3.4.1. The Notifying Party’s view

(108)    The Notifying Party submits that the proposed transaction does not raise any customer foreclosure concerns since, post-transaction, Intel plans to […]. Moreover, the Notifying Party submits that Altera's overall demand for contract manufacturing services is limited compared to the overall demand in the market.

5.3.4.2. The results of the market investigation and the Commission’s assessment

(109)    The Commission acknowledges that Intel would have the ability to reduce Altera's purchases from other contract manufacturing companies upstream (66) and move the manufacture of Altera's FPGAs in-house. However, it is not clear whether Intel would have the incentive to do so, since this would require additional costs and investments. In particular, Altera currently […]. (67)

(110)    In addition, Altera's cost of sales in 2014, which can be used as a proxy to estimate its demand for contract manufacturing services, accounted for only [0-5]% of the revenues of the overall worldwide market for semiconductor contract manufacturing services. Even if all of Altera's FPGA needs were to be satisfied by Intel post-transaction, they would only account for a minor share of the overall worldwide demand for contract manufacturing services.

(111)    In relation to the possibility of customer foreclosure, a respondent to the market investigation highlighted that, post-transaction, if Intel were to become the sole provider of FPGAs used in conjunction with Intel's CPUs, (68) this would provide it with increased market power in the upstream market for semiconductor contract manufacturing services, as Intel would manufacture its integrated FPGA/CPU products in-house. (69) In this regard, the Commission notes that: (i) post-transaction, other FPGA and CPU manufacturers would remain active in the market and would be able to cooperate to produce integrated products, in particular based on CPU architectures other than the x86 architecture; (ii) other competitors would remain active in the semiconductor contract manufacturing market and would compete  with Intel on innovation and first-to-node advantage; (iii) even if Intel were to manufacture all the integrated CPU/FPGA products for workload acceleration, this would only account for a limited share of the overall semiconductor contract manufacturing market and may actually be pro-competitive, as it would help Intel grow its limited position in a market where the market leader (TSMC) has a market share above [50-60]%.

(112)    For the reasons set out above, the proposed transaction is unlikely to give rise to customer foreclosure in relation to the provision of contract manufacturing services by Intel's competitors.

5.4. Assessment of conglomerate relationships

5.4.1. Introduction

(113)    According to paragraph 92 of the non-horizontal Guidelines, “conglomerate mergers in the majority of circumstances will not lead to any competition problems”. According to paragraph 93 of the non-horizontal Guidelines, “the main concern in the context of conglomerate mergers is foreclosure. The combination of products in related markets may confer on the merged entity the ability and incentive to leverage a strong market position from one market to another by  means of tying or bundling or other exclusionary practices.”

(114)    In light of its very high market shares in the CPU markets (see Section 5.1.1), notably in the possible markets for CPUs for servers and for x86 CPUs for servers, the Commission considers that Intel has a strong market position within the meaning of paragraph 93 of the non-horizontal Guidelines in the CPU markets. (70) The Commission therefore investigated if, post-transaction, the merged entity could have the ability and incentive to pursue strategies of tying and bundling aimed at foreclosing competitors in the markets for CPUs for servers and x86 CPUs for servers and/or in the market (or segment thereof) for FPGAs of different performance characteristics used for workload acceleration in servers.

(115)    The Commission premised its assessment of the conglomerate relationships on the narrow market definitions for CPUs for servers and for x86 CPUs for servers on  the one hand and on the narrowest possible market definition for FPGAs, that is to say FPGAs of different performance characteristics used for workload acceleration in servers for the following reasons. As set out further in the following paragraphs, a close relationship between Intel's CPUs and Altera's FPGAs within the meaning of paragraph 91 of the non-horizontal Guidelines, according to which markets are, for instance, closely related if a merger involves suppliers of complimentary products, only exists in relation to workload acceleration in servers, and the proposed transaction does not raise any competition concerns even on those narrowest possible market definitions.

(116)    As described in Section 5.1.1, Intel is a leading producer of CPUs worldwide. Altera is not present on the CPU market but it is the second largest market player in the FPGA market worldwide (see Section 5.1.3).

(117)    In data centre servers, CPUs and FPGAs complement each other in that they are used alongside each other in the computing layer of servers, that is to say the layer that is in charge of processing the data, as opposed to the storage layer which stores data in the memory and the networking layer which manages the flow of data. As indicated in section 4.2.1, an FPGA paired with a CPU in the compute layer can perform certain computational workload faster and in a more energy-efficient way. (71)

(118)    CPUs and FPGAs can be paired for the purposes of workload acceleration  in servers and thus complement each other in different ways. Firstly, they can be interconnected through an electro-mechanical interface technology. In order to do so, FPGAs are installed on an add-in board and are connected to the CPU in the server through the so-called Peripheral Component Interconnect express ("PCIe"). (72) The use of PCIe goes well beyond the products at hand. PCIe is a  widely used interface that is built into every server. It is used for installing a wide range of high-performance components such as graphics boards, network controllers and solid state drives ("SSDs"). It is also used for other peripheral devices in servers, but also in computers more generally. PCIe is an open standard solution. Its specifications have been developed though cooperative standard- setting under the auspices of the PCI-SIG, the community responsible for developing and maintaining the standardised approach to peripheral component I/O data transfers.

(119)    Secondly, CPUs and FPGAs can be interconnected through proprietary  interconnect technologies which, similarly to open standard PCIe technology, allow for the pairing of discrete CPUs and FPGAs. CPU suppliers, including Intel, have developed such technologies and may decide to license them to FPGA suppliers for them to interconnect their FPGAs with the CPU suppliers’ CPUs. When, in 2007, Intel started to collaborate with FPGA producers and third party vendors to develop FPGA acceleration solutions for Intel platforms in data centres, Intel developed its proprietary direct interconnect technology called QuickPath Interconnect (“QPI”). In 2018 Intel plans to launch commercially a new version of its proprietary direct interconnect technology, referred to as Keizer Technology Interconnect ("KTI") or UltraPath Interconnect ("UPI"). (73)

(120)    Thirdly, Intel submits that the rationale to acquire Altera is to develop an integrated product that combines a CPU (74) and an FPGA more tightly. In a first step,  Intel plans to integrate two discrete chips in a multi-chip package (“MCP”). In a second step, Intel plans to integrate the two on the same piece of silicon, also called "die" ("single-die solution").

(121)    Both envisaged solutions would place the CPU and the FPGA in the same socket on the server's motherboard. The MCP solution will interconnect the two semiconductors via Intel's KTI technology.

(122)    In light of the above considerations regarding the complementarity of CPUs and FPGAs that are interconnected for the purposes workload acceleration in servers, the Commission considers that the markets for servers and for x86 CPUs for servers on the one hand and the market (or segment thereof) for FPGAs of different performance characteristics used for workload acceleration in servers are closely related and will analyse, in the following sections, whether Intel will have the ability and incentive to foreclose FPGA and CPU suppliers, as well as the overall likely impact of such possible foreclosure on prices and choice.

5.4.2. Foreclosure of FPGA suppliers

5.4.2.1. Ability to foreclose FPGA suppliers The Notifying Party's view

(123)    As regards the ability to foreclose competing suppliers of FPGAs of different performance characteristics used for workload acceleration in servers, Intel submits that the use of FPGAs in such a market (or segment thereof) would be very limited absent the proposed transaction and that, therefore, the proposed transaction plays a catalyst role in growing this nascent and limited market.

(124)    In relation to its proprietary interconnect technologies QPI and KTI, Intel submits that it will not have the ability to foreclose competing FPGA suppliers by choosing not to license those proprietary interconnect technologies to them. In particular, Intel submits that interconnection via PCIe is currently the predominant solution  for discrete FPGA acceleration and will remain a viable alternative post- transaction. Intel explains that PCIe is a high-bandwidth interconnect that serves as the universal interface for connecting components to servers and presents technological and cost advantages over QPI and KTI. Intel also submits that KTI and QPI interconnection […].

(125)    As regards specifically PCIe, Intel submits that it will not have the ability to degrade the PCIe interconnect technology given that its specifications are set by PCI-SIG, an industry organisation with over 700 members and a board of directors independent from both Intel and Altera. PCIe is available to everyone on FRAND (75) terms,  supports  numerous  different  technologies  and  is  supported  by  all server manufacturers in their platforms as this interface is a central part of the server platform.

(126)    Moreover, Intel has licensed QPI for use by, among others, FPGA vendors, […]. Intel explains that […]. From a technological standpoint, […]. (76)

(127)    Intel has also licensed KTI to a number of companies, namely […]. As of mid-2013, Intel also negotiated the terms of a licence with […]. […]. The Commission has not received any evidence during its investigation that the […] was related to the proposed transaction. The Commission notes, in particular, that […] (77) […]. (78) Contrary to QPI based solutions, KTI based solutions are not yet commercially available. Also, based on the information provided by Intel, […]. (79)

(128)    More generally, the "add-in board" integration of CPUs and FPGAs based on PCIe, QPI or KTI as described in the preceding paragraphs has not yet taken off commercially. A major limitation, as also identified by Intel itself, is that the FPGA is inserted into a CPU socket in place of another CPU, leaving customers with only one CPU in a server designed for two, thereby negatively impacting the performance of the server. Some companies have been working on developing FPGA based workload acceleration solutions. However, no such solution has been launched on a commercial scale. The only company that, according to Intel, is expected to launch such a solution in the near future is […]. In addition, according to Intel, workload acceleration based on QPI is only carried out […].

(129)    Intel also considers that, based on its behaviour during the term of the QPI licence and during licensing negotiations regarding KTI, Altera's main competitor Xilinx does not need access to QPI and/or KTI in order to be able to compete on the market (or segment thereof) for FPGAs of different performance characteristics used for workload acceleration in servers. […]. (80) […].

The results of the market investigation and the Commission’s assessment

(130)    Although a number of respondents to the market investigation voiced concerns regarding Intel's ability to foreclose FPGA suppliers, the overall feedback received suggests that market participants expect that the merger would not have a negative impact on prices and choice. One respondent, for instance, considers that integrating the relevant products would reduce the number of parts to be included  in a server, that it could optimise form factors and that it could ultimately generate cost savings. (81) Another respondent submits that Altera will continue to have  leading edge technology based on the investment capabilities of Intel and together the two companies could offer a greater range of products than they could individually. (82)

(131)    As regards Intel's argument on the possible catalyst role of the proposed transaction in growing the market of FPGAs used in servers for workload acceleration, some  of the respondents to the market investigation indicated that the forecast in  the short term for the use of FPGAs in servers is stable or would experience only limited growth. (83) Furthermore the majority of respondents who expressed an opinion consider indeed that the proposed transaction will likely boost demand for FPGAs. (84) One respondent for instance explains that the benefits of relying on  FPGA acceleration will become well known and easy for customers to  implement. (85)

(132)    When analysing the possible interfaces used to perform workload acceleration, the majority of respondents to the market investigation currently relies on PCIe for workload acceleration rather than on the commercially available QPI interconnect. (86) The reasons for such choices are mixed. Certain respondents consider that PCIe provides better performance, while others consider that QPI and KTI are more time consuming and costly to implement. Conversely, a number of respondents submit that QPI and KTI provide better performance. At the same  time, a number of respondents were not  even  aware of  the existence of  QPI and KTI, (87) or mistakenly believed that Intel does not make QPI and KTI available to third parties. (88)

(133)    Despite the current situation, in which PCIe is widely used for workload acceleration and despite some market participants being unaware of the existence of QPI and KTI, the majority of respondents consider that having access to Intel’s QPI or KTI interconnection technology will be important to compete in relation to workload acceleration in the future. (89)

(134)    As regards a closer integration of CPUs and FPGAs via a MCP solution or a single- die solution, contact with market participants and the replies to the market investigation highlighted that market participants generally consider that, if, post- transaction, Intel were to launch such an integrated product (either an MCP  solution or a single-die solution), a sufficient number of third party FPGA suppliers would be able to continue competing against such MCP or single-die solutions with add-on board solutions, that is to say with solutions where the FPGA is connected to the CPU through PCIe, QPI, KTI or any other proprietary interconnect technologies. (90)

(135)    In light of the feedback received from market participants during the market investigation, and for the reasons set out below, the Commission considers that Intel would not have the ability to foreclose FPGA suppliers by refusing to grant a licence to its proprietary interconnect technologies QPI and KTI for the following reasons.

(136)    First, the Commission considers that Intel would not have the ability to foreclose FPGA suppliers because the PCIe interconnect technology is a valid alternative to Intel's proprietary interconnect technologies.

(137)    The Commission notes that, despite the presence of certain market participants which consider that the current version of PCIe (PCIe 3.0) does not perform as well and is less adapt to workload acceleration than QPI and KTI, (91) a comparison of the key technical specifications of the three interconnect technologies (as well as of the future PCIe 4.0) shows that it is likely that PCIe is a viable alternative for the majority of workload acceleration tasks.

(138)    Table 8 below lists the key technical parameters, on which the Commission's comparison  is  based. (92) Those  comprise,  among  others,  the  number  of  lanes possible workload acceleration functions including, among others, the running of search algorithms.

possible workload acceleration functions including, among others, the running of search algorithms.

(142)    The Commission also notes that PCI-SIG is in the final stages of defining the specifications of the next generation PCIe interconnect, PCIe 4.0 (see  specifications set out in Table 9 above). As per those specifications, PCIe 4.0 will offer considerably improved performance compared to PCIe 3.0 as well as QPI and KTI as regards lane bandwidth and overall throughput. It is expected to be commercially available as of 2016. (95) In light of the set-up of PCI-SIG further described in paragraph (125), the Commission considers that Intel will not have the ability to delay the launch of PCIe 4.0. The lack of incentives of Intel do to so is further discussed in section 5.4.2.2 below.

(143)    Therefore, in conclusion, the Commission considers that the PCIe interconnect technology that is openly available on FRAND terms is a viable alternative to Intel's proprietary QPI and KTI interconnect technologies. As a result, Intel would not be able to foreclose FPGA competitors from the market (or segment thereof)  for FPGAs of different performance characteristics used for workload acceleration in servers.

(144)    Second and in any event, Intel has granted licences to QPI and KTI or offered to enter into licence agreements for QPI and KTI to several FPGA suppliers other  than Altera.

(145)    The licences already agreed upon constitute commercial agreements by which Intel is bound during their term and which it can only terminate if the conditions set out in those agreements are met. (96)

(146)    In addition, the Commission notes that Intel has further underpinned its willingness to continue working with FPGA suppliers other than Altera by making an unconditional and binding offer to two FPGA suppliers, […], for a licence to its proprietary KTI interconnect technology.

(147)    The offer was made to both companies on 30 September 2015 and remains valid until 31 December 2016.

(148)     […].

(149)    At the time of the present decision the terms of the package negotiated between Intel and […] foresees that Intel would grant a worldwide, non-exclusive, non- transferrable, non-sublicenseable, terminable, royalty-free and fully paid licence to its KTI technology to  […].  In  exchange  for that licence,  […]  would agree to a covenant not to sue ("CNTS"). […]. Most importantly, the licence agreement covers future changes to the KTI technology, […].

(150)    The Commission considers that this advanced stage of the negotiations indicates that the offers provide a genuine means of enabling two of Altera's competitors to compete on the market (or segment thereof) for FPGAs of different performance characteristics used for workload acceleration in servers. In particular, in the short- term following the merger, two potential competitors of Altera have the ability to enter the market on the basis of licences to Intel's proprietary KTI interconnect technology without Intel being able to foreclose those two companies. […] would thus not only be able to offer competing FPGA acceleration solutions on the basis of PCIe, but also on the basis of Intel's proprietary KTI interconnect technology.

(151)    In light of the above, the Commission considers that, post-transaction Intel will not have the ability to foreclose FPGA suppliers from the market (or possible segment) for FPGAs of different performance characteristics used for workload acceleration in servers.

5.4.2.2. Incentive to foreclose FPGA suppliers The Notifying Party's view

(152)    Even if it did have the ability to foreclose FPGA suppliers, Intel submits that it would not have any incentive to do so as regards FPGAs of different performance characteristics used for workload acceleration in servers.

(153)    First, Intel submits that the proposed transaction would not alter its incentives to license QPI and KTI. The primary purpose of those two interconnect technologies is to connect CPUs with each other. Intel has granted licences to QPI and KTI to companies who provide certain compute elements such as node controllers and repeaters so that Intel can enable server manufacturers to support CPU-to-CPU communications in servers that contain more than eight Intel CPUs, thereby enabling Intel to compete in the high end of the server segment against servers  from IBM and Oracle who use their own proprietary CPUs and interconnection technologies. Intel has an incentive to remain competitive in this segment and will thus continue licensing QPI and KTI.

(154)    Second, Intel submits that it would not have any incentive to impair the use of PCIe (97) since, by doing so, Intel would impair the performance of a number of Intel products (i.e. network controllers, switches, solid state drives, etc.) that operate via PCIe. Therefore, if Intel were to impair PCIe, it would reduce the value of Intel- based servers to customers, which would be counter-productive for Intel.

The results of the market investigation and the Commission’s assessment

(155)    As already indicated in paragraph (132), a number of respondents voiced concerns as regards the possibility to licence QPI and KTI from Intel. Respondents to the market investigation, however, did not raise any concerns regarding the incentives of Intel to degrade PCIe.

(156)    The Commission considers that, in light of the setup of PCI-SIG and in light of the fact that PCIe is a widely used interconnect technology upon which Intel also relies in relation to other products it sells, it would be commercially unattractive for Intel to degrade PCIe. Indeed, Intel would run the risk of cannibalising sales that are unrelated to its activities on the market (or segment thereof) for FPGAs of different performance characteristics used for workload acceleration in servers.

(157)    As regards the incentives of Intel to refuse licensing QPI and KTI to FPGA suppliers who intend to compete on the market (or segment thereof) for FPGAs of different performance characteristics used for workload acceleration in servers, the Commission notes that Intel has recently submitted offers for a KTI licence to two of Altera's competitors, […] (see paragraphs (144) to (150)). Notwithstanding those offers and based on the information available, the Commission cannot exclude that Intel would not have an incentive to refuse licensing QPI and KTI to other FPGA suppliers who intend to compete on the market (or segment thereof) for FPGAs of different performance characteristics used for workload acceleration in servers. In particular, in the Form CO Intel merely argues that it […]. During the course of its investigation, however, the Commission has not gathered any information that would allow it to conclude that, apart from the two offers for a KTI licence made  by Intel and apart from having an incentive to licence QPI and KTI for purposes other than FPGA acceleration in servers, Intel would have an incentive to continue licencing QPI and KTI to other competitors of Altera on the market (or segment thereof) for FPGAs of different performance characteristics used for workload acceleration in servers.

(158)    However, even if Intel were to have such an incentive, the Commission considers that the overall assessment on the conglomerate effects of the proposed transaction would not change as Intel would not have the ability to foreclose FPGA suppliers on the market (or segment thereof) for FPGAs of different performance characteristics used for workload acceleration in servers.

5.4.2.3. Possible pro-competitive effects of the proposed transaction Introduction

(159)    Intel submits that the proposed transaction will enable it to integrate FPGAs and CPUs more closely, which would improve the performance of workload acceleration technology […]. Intel expects that developing those solutions would increase demand for FPGA based workload acceleration solutions in servers or create such demand in the first place. Although the Commission considers that Intel would not be able to foreclose other FPGA suppliers in the first place, it nevertheless also investigated the overall likely impact of the proposed transaction on FPGA based workload acceleration solutions in servers. The Commission investigated, in particular, whether the pro-competitive effects claimed by Intel would outweigh any potential anti-competitive effects of the proposed transaction on FPGA suppliers (such anti-competitive effects being, in the Commission's estimation, unlikely to arise in any event, for the reasons set out in Section 5.4.2.).

The Notifying Party's view

(160)    As indicated in paragraph (120), Intel submits that the proposed transaction will enable it to develop a better-performing, […] integrated solution for FPGA based workload acceleration that would otherwise not exist. This will help grow the market for workload acceleration solutions, which is at present almost non-existent. The proposed transaction will not result in limiting Intel's customers' ability to use FPGAs for workload acceleration or their choice of FPGAs.

(161)    In particular, Intel considers that the MCP solution will […] the performance of the current add-in board solution and save customers the cost of developing their own add-in board with technical and cost advantages. Intel expects to start selling this solution […] and that this solution would be used commercially […].

(162)    Moreover, when considering the single-die option, Intel submits that it will bring further significant benefits for customers: (i) lower acquisition cost relative to the MCP solution; (ii) further performance […]; (iii) further improvements in power consumption; and (iv) improved access to standard software programming models that will lower the cost of use even more. According to Intel, the cost and performance advantages of the integrated product will boost the demand for FPGAs  in (server) workload acceleration for the benefit of customers. Intel submits that this integrated product will be available only from […].

(163)    According to Intel, workload acceleration is a very recent trend which does not account for a big portion of sales for FPGAs manufacturers. Intel submits that FPGAs are predominantly used in applications where Intel's CPUs are not used. Most of Altera's sales, for example, concern telecom and wireless applications, such as mobile infrastructure but also smartphones and tablets (44% in terms of revenues). Only 16% of Altera's sales concern networking, compute and storage applications. (98) Only a very limited fraction of those sales concern FPGAs of different performance characteristics used for workload acceleration in servers where both FPGAs and Intel CPUs are used in a complementary way. By way of reference, and as further set out below in paragraph (172), Intel estimates that less than [0-5]% of Altera's FPGA sales go to CSPs, which are considered to be the most important customers for FPGA based workload acceleration solutions.

(164)    As regards the growth potential of the market, Intel estimates that, absent the proposed transaction, demand for FPGAs as accelerators would be limited, amounting to around […] units until 2020-23 or less than […] units on average per year. (99)  Intel expects a growth of demand with the proposed transaction. It    expects

that virtually all of the projected demand for integrated solutions would be new demand, and not demand resulting from displacement of existing discrete solutions. Intel projects that with the proposed transaction demand for single-die solutions  will be […] units in the […] period, or approximately [5-10]% of Intel’s estimated CPU sales in the […] period. This projected volume is expected to come almost entirely from new demand for integrated CPU/FPGA products rather than from displacement of discrete solutions, although Intel has not analysed the exact extent to which the availability of the integrated product could displace sales of discrete solutions.

(165)    In addition, Intel submits that the FPGAs of different performance characteristics used for workload acceleration in servers are the same as those also used in other applications and can be bought off-the-shelf by any customer.

(166)    Customers will moreover continue to have the choice between Altera's FPGAs and those of competitors, most notably of Xilinx, the market leader.

The results of the market investigation and the Commission’s assessment

(167)    Overall, responses of market participants to the market investigation do not  indicate that they are concerned that the proposed transaction would have a negative impact on competition in the affected markets.

(168)    Respondents to the market investigation also submitted that integrated FPGA acceleration solutions could exist next to distinct acceleration solutions which would remain available on the market. FPGA suppliers would continue to be able  to compete on price and performance with integrated solutions, both in general and also especially for customers not using x86 CPUs. (100)

(169)    The majority of respondents to the market investigation consider that the proposed transaction will have no impact or a positive impact on the overall FPGA market. As regards the impact of the proposed transaction on the market (or possible segment thereof) for FPGAs of different performance characteristics used for workload acceleration in servers, replies were more mixed. (101)

(170)    The majority of respondents replied that the proposed transaction is likely to have no impact or a positive impact on their companies. (102)

(171)    The Commission considers that the proposed transaction is unlikely to have a negative impact on prices and choice as regards the market (or possible segment thereof) for FPGAs of different performance characteristics used for workload acceleration in servers.

(172)    The Commission notes, first, that demand for FPGA based workload acceleration solutions is very limited today. As explained in paragraph (128), such solutions have not yet been launched on a commercial scale and their current use seems to be very limited. This is further corroborated by the fact that in 2014, Altera's sales of FPGAs to CSPs represented less than [0-5]% of Altera's overall FPGA sales both in terms of value and volume. (103) Despite Intel's growth estimates, the Commission considers that the development of FPGA based workload acceleration solutions for servers is essentially still nascent. The market may take more than two to three years to meaningfully develop.

(173)    If demand were not to take off as a result of Intel developing integrated workload acceleration solutions to be used in data centre servers, the proposed transaction would likely not have any negative impact on prices and choice as regards the market (or possible segment thereof) for FPGAs of different performance characteristics used for workload acceleration in servers. On the contrary, if new demand were to be created as a result of Intel developing such solutions, the impact of the proposed transaction on the market (or possible segment thereof) for FPGAs of different performance characteristics used for workload acceleration in servers might even be positive, including by increasing demand for integrated FPGA acceleration solutions.

(174)    In that context the Commission notes that respondents to the market investigation even consider that they will be able to continue competing against Intel's integrated solutions on the basis of discrete solutions (see paragraph (168)). Indeed, given that PCIe is a viable alternative to QPI and KTI and given that, as explained in paragraphs (126) and (127) and in paragraphs (146) to (149), Intel is  granting access to its proprietary QPI and KTI interconnect technologies, the Commission considers that any innovative integrated solution launched by Intel would either have no impact on the market or would add an innovative solution to existing ones, thereby creating new demand.

(175)    Second, according to paragraph 113 of the non-horizontal Guidelines, it is “only when a sufficiently large fraction of market output is affected by foreclosure resulting from the merger that the merger may significantly impede effective competition. If there remain effective single-product players in either market, competition is unlikely to deteriorate following a conglomerate merger”.

(176)    As regards the FPGA market, the Commission notes that only a minor part of the revenues of FPGAs suppliers are generated in the market (or segment thereof) for FPGAs of different performance characteristics used for workload acceleration in servers, (104) which would indicate that any foreclosure of this segment would have a very limited impact on the ability of FPGA suppliers to continue competing with Altera.

5.4.2.4. Conclusion on foreclosure of FPGA suppliers

(177)    In light of the above, the Commission considers that the proposed transaction does not give rise to serious doubts with regard to its compatibility with the internal market on the basis of foreclosure of FPGA suppliers.

5.4.3. Foreclosure of CPU suppliers

5.4.3.1. Ability to foreclose CPU suppliers The Notifying Party's view

(178)    As regards Intel's ability to foreclose other CPU suppliers post-transaction in the potential market for x86 CPUs for servers, Intel submits, first, that Altera will continue to operate as a separate business and that no early termination of Altera's product lines is planned.

(179)    Second, Intel submits that [70-80]% of Altera's sales are done via independent distributors. Neither Intel nor Altera will have the ability to foreclose CPU suppliers form sourcing Altera's FPGAs post-transaction since the distributors are free to sell Altera's FPGAs to any market participant.

(180)    Third, Intel submits that workload acceleration can be achieved in different ways and not only with FPGAs. For instance, GPUs can be used to accelerate computations associated with large vectors or matrices of floating point numbers and GP-GPUs can accelerate non-graphical server workloads. According to Intel, its market share in the market for GP-GPUs is limited (below [10-20]%) while the main market player, Nvidia, had a share of [80-90]%.

The results of the market investigation and the Commission’s assessment

(181)    The majority of respondents to the market investigation consider that Intel will continue selling Altera's FPGAs compatible with third party CPUs both in the market (or segment thereof) for FPGAs of different performance characteristics used for workload acceleration in servers and outside such a market/segment. (105) Several respondents considered that any foreclosure in that respect of FPGA customers would result in an unsustainable decline of Altera's revenues.

(182)    Market participants also consider that post-transaction there would be a sufficient number of FPGA suppliers to ensure proper supply of FPGAs.

(183)    Despite some CPU suppliers considering the risk of being foreclosed from purchasing Altera's FPGAs (106), the majority of respondents to the market investigation highlighted also that there will be sufficient suppliers of FPGAs for workload acceleration even if the merged entity were to stop selling FPGAs to third parties. (107) Respondents consider this to be the case even when considering the narrower segment of FPGAs of different performance characteristics used for workload acceleration in servers. (108)

Moreover, even if, post-transaction, the prices of Altera's FPGAs were to increase, the majority of respondents consider that they would be able to find an alternative supplier for FPGAs both in a broader sense as well as for FPGAs of different performance characteristics used for workload acceleration in servers. (109)

(185)    Nonetheless, switching suppliers might not be easy, since, according to the  majority of the respondents to the market investigation, it is, already today, not  easy to switch FPGA supplier. (110) In this regard, respondents to the market investigation pointed out that the proposed transaction will not have an impact on the difficulties involved in switching FPGA suppliers. (111)

(186)    The general market interest for workload acceleration solutions is confirmed by the majority of respondents to the market investigation, which includes both FPGA and CPU suppliers, indicating that CPU suppliers and other market participants are planning to launch competing solutions to those of Intel and Altera for workload acceleration in data centres. (112)

(187)    The Commission notes, first, that Intel already has a strong position in the market for x86 CPUs. This position will not change as a result of the proposed transaction.

(188)    Moreover, CPU suppliers will indeed continue to be able to source FPGAs from Altera. In addition, CPU suppliers will have the possibility to source FPGAs also from other suppliers such as Xilinx, the current market leader. In relation to the concern voiced by a CPU manufacturer that post-transaction Xilinx would be the only remaining FPGA supplier, the Commission notes that there are a number of other FPGA suppliers left in the market, including Lattice Semiconductor and Achronix, who will continue to be able to compete on the FPGA market in general […]. (113)

(189)    Finally, in relation to the willingness of market participants to develop competing solutions for FPGA workload acceleration, the Commission notes that on 9  October 2015, Xilinx and Qualcomm announced a strategic technical collaboration to develop competing workload acceleration solutions for servers based on  different levels of integration between CPUs and FPGAs. (114) This partnership further corroborates the Commission's view that Intel will not have the ability foreclose CPU suppliers from competing against Intel in relation to the development of FPGA based workload acceleration solutions for servers.

(190)    In light of the above, and on the basis of the information before it, the Commission considers that, post-transaction, Intel will not have the ability to foreclose CPU suppliers from sourcing FPGAs from Altera or from its competitors.

5.4.3.2. Incentive to foreclose CPU suppliers The Notifying Party's view

(191)    Intel submits that the primary customers of FPGAs are not data centre operators and that FPGAs used in workload acceleration are off-the-shelf products which can be used in a variety of applications. Therefore terminating sales or curtailing the future development of FPGAs that are suitable for use in acceleration  would require Intel to give up the large stream of revenues associated with these products.

The results of the market investigation and the Commission’s assessment

(192)    The Commission considers that it is thus unlikely that Intel would have any incentive in selling Altera's FPGAs only in connection to its x86 CPUs. Indeed, [80-90]% of Altera's revenues are generated mainly from market segments outside FPGAs of different performance characteristics used for workload acceleration in servers. (115) The additional revenues from the exclusive sale of FPGAs connected with Intel's x86 CPUs would not, therefore, compensate the loss of revenues in the other FPGA markets or segments.

(193)    This assessment might change when considering only the potential market for FPGAs of different performance characteristics used for workload acceleration in servers. Here, the incentives to sell Altera's FPGAs only in connection with Intel x86 CPUs might be present in light of the strong position of Intel in the market for x86 CPUs. However, the majority of respondents to the market investigation consider that Intel will continue to sell Altera's FPGAs that are compatible with third party CPUs both in the broader FPGA market as well as in the market (or segment thereof) for FPGAs of different performance characteristics used for workload acceleration in servers. (116)

(194)    In conclusion, the Commissions considers that, while, on the basis of the information available, it is not clear whether, post-transaction, Intel will have the incentive to foreclose CPU suppliers, Intel would not have the ability to foreclose CPU suppliers in any event. As such, the proposed transaction would not give rise to serious doubts as to its compatibility with the internal market on the basis of conglomerate effects concerning CPU suppliers.

5.4.3.3. Overall likely impact on prices and choices of foreclosing CPU suppliers

(195)    The market investigation gave mixed results with regards to the impact of the proposed transaction on the CPU market. Some respondents took the view that the proposed transaction would have a negative impact in light of Intel's already dominant presence in such market. Other respondents considered that there would be no impact or even a positive impact in the CPU market (both in the broader sense, as well as the x86 CPU market and the potential market for x86 CPUs for servers.) (117)

(196)    For the reasons set out below, the Commission considers that the proposed transaction is unlikely to have a negative impact on prices and choice as regards the markets for CPUs.

(197)    As regards the market for x86 CPUs, the Commission considers that the strong position of Intel in this market is not merger-specific and most likely will not change as result of the proposed transaction. Intel's CPU suppliers will be able to supply FPGAs or other semiconductors for their workload acceleration solutions and the competitive dynamics will not be significantly altered as compared to the current situation.

(198)    With regards to other CPU markets (e.g. CPUs used in telecommunications devices or Internet Of Things applications) the presence of Intel among CPU suppliers is rather limited, which would reduce even further the effect of the proposed transaction.

5.4.3.4. Conclusion on foreclosure of CPU suppliers

(199)    In light of the above, and on the basis of the information before it, the Commission considers that the proposed transaction does not give rise to serious doubts with regard to its compatibility with the internal market on the basis of conglomerate effects concerning CPU suppliers.

6. CONCLUSION

(200)    For the above reasons, the European Commission has decided not to oppose the notified operation and to declare it compatible with the internal market and with the EEA Agreement. This decision is adopted in application of Article 6(1)(b) of the Merger Regulation and Article 57 of the EEA Agreement.

1                  OJ L 24, 29.1.2004, p. 1 ('the Merger Regulation'). With effect from 1 December 2009, the Treaty on the Functioning of the European Union ('TFEU') has introduced certain changes, such as the replacement of 'Community' by 'Union' and 'common market' by 'internal market'. The terminology of the TFEU will be used throughout this decision.

2                  OJ L 1, 3.1.1994, p. 3 ("the EEA Agreement").

3                  Publication in the Official Journal of the European Union No C 310, 19.09.2015, p. 7.

4            For a detailed description of the functioning of workload acceleration in servers see recitals (117) to (121).

5            In other applications where FPGAs can be used, such as wireline, wireless, industrial, military, medical and automotive applications, Intel's CPUs are not used or have a limited presence.  In addition, for those other applications, Intel does not plan to launch an integrated FPGA/CPU product.

6            x86 is a specific CPU architecture. Other CPU architectures comprise, for instance, the ARM- architecture and the Power architecture.

7            Commission decision of 13.05.2009 relating to a proceeding under Article 82 of the EC Treaty and Article 54 of the EEA Agreement (COMP/C-3/37.990 – Intel), paragraph 835.

8            Case M.5984 – Intel/McAfee, Commission decision of 26 January 2011, paragraphs 29-30.

9            ARM stands for Acorn RISC Machine, which is a family of reduced instruction set computing (RISC) instruction set architectures (the part of the computer architecture related to programming),  configured for various environments, developed by ARM Holdings.

10          See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 6.

11          See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 6.1.

12          Power Architecture is a family of RISC instruction set architectures, configured for various environments, developed by IBM.

13          MIPS stands for Microprocessor without Interlocked Pipeline Stages, which is a family of RISC instruction set architectures, configured for various environments, developed by MIPS Technologies.

14          SPARC stands for Scalable Processor Architecture, which is a family of RISC instruction set architectures, configured for various environments, developed by Sun Mycrosystems.

15          See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 7.

16          See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 7.

17          See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 7.1.

18          As Intel only sells x86 CPUs, its position in the overall CPU market can be used as a proxy of the relevance of x86 CPUs in the overall CPUs market. Intel has respectively a volume market share of [80-90]% in the overall market of CPUs for notebooks (see Table 10 of Annex 12 to the Form CO), and of [90-100]% in the overall market of CPUs for servers (see Table 1 of Annex 12 to the Form CO).

19          The Notifying Party submits that sales of non x86 CPUs for desktops are […] (see Notifying Party's reply to Request for Information, N.1 – First part of reply, question 31 of 3 July 2015).

20          Commission decision of 13.05.2009 relating to a proceeding under Article 82 of the EC Treaty and Article 54 of the EEA Agreement (COMP/C-3 /37.990 – Intel), paragraph 836.

21          Case M.5984 – Intel/McAfee, Commission decision of 26 January 2011, paragraphs 31-33.

22          See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 17.

23          An FPGA contains programmable logic components called logic elements (“LEs”) and a hierarchy of reconfigurable interconnects that allow the LEs to be physically connected.

24          Volatile memory is computer storage that only maintains its data while the device is  powered. Volatile memory contrasts with non-volatile memory, which does not lose content when power is lost. Non-volatile memory has a continuous source of power and does not need to have its memory content periodically refreshed.

25          ASICs are integrated circuits (semiconductor chips) that are designed for a specific application by a system manufacturer for its exclusive use.

26          ASSPs are integrated circuits that are designed for a specific application by a semiconductor supplier and sold to multiple customers for integration into their products.

27          High-end products are manufactured at a smaller process node, which delivers better performing products. As of today, the smallest manufacturing node at which Altera's FPGA are manufactured   is

14 nanometer (nm). By way of comparison, Xilinx's FPGAs are manufactured at 16 nm. The semiconductor manufacturing process is further explained in section 4.3 below.

28          PCIe is a high-speed serial computer expansion interconnect used to connect expansion cards to the motherboard of a computer. PCIe specification has been developed though cooperative standard- setting under the auspices of the PCI-SIG, the community responsible for developing and maintaining the standardized approach to peripheral component I/O data transfers.

29          See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 8.

30          See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 8.1.

31          See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 9.

32          See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 9.1.

33          See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 10.

34          See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 10.1.

35          See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 11.

36          See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 12.

37          See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 13.

38          See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 13.1.

39          See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 14.

40          See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 14.1.

41          See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 15.

42          See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 15.1.

43          Commission decision of 24 June 2002 in Case M.2820 - STMicroelectronics/AlcatelMicroelectronics; Commission decision of 3 July 2001 in Case M.2439 - Hitachi/STMicroelectronics/SuperH JV; Commission decision of 10 August 2007 in Case M.4751- STM/Intel/JV; Commission decision of 27 June 2008 in Case M. 5173 - STM/NXP/JV; Commission decision of 25 November 2008 in Case M. 5332 - Ericson/STM/JV; and Commission decision of 2 December 2009 in Case M.5535 - Renesas Technology/NEC Electronics.

44          See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question to question 18.

45                Commission decision of SA 30596 (N 101/2010) – GLOBALFOUNDRIES Group (Fab Booster Investment) Dresden, para. 77; State aid No. N 480/2000 – UK - Motorola Limited, Dunfermline, Scotland; and State Aid N 434/2001 – France Aide à ATMEL.

46                Commission decision of SA 30596 (N 101/2010) – GLOBALFOUNDRIES Group (Fab Booster Investment) Dresden, para. 77; State aid No. N 480/2000 – UK - Motorola Limited, Dunfermline, Scotland; and State Aid N 434/2001 – France Aide à ATMEL.

47                According to the Notifying Party, the market shares provided in this table overestimate Intel's position, since the total market against which those shares are calculated does not include non x86 based products in the PC and the server space.

48                C/RISC consists of IBM's POWER architecture and SPARQ architecture. C/RISC as ARM is party of RISC architecture. RISC architectures are characterized by a relatively small set of instructions which typically execute more quickly than CISC architectures, on which Intel is based.

49                "First to node" advantage refers to the competitive advantage that an FPGA supplier enjoys from a commercial perspective when it is the first to provide a product at a narrower process node. For example, Xilinx's higher market share in the high-end FPGA market segment compared to Altera's is due to its time-to-market advantage in releasing FPGAs manufactured at 22nm process node.

50                IBS, Global system IC industry service report, December 2014, Table 2.

51                See Notifying Party's reply to Request for information of 7 October 2015.

52          OJ C 265, 18.10.2008, p. 6.

53          By way of example, the multi-chip package resulting from the planned integration of Intel's CPUs and Altera's FPGAs is an electronic assembly wherein multiple integrated circuits are linked onto a unifying substrate. This latter operation is carried out after the first process of wafer manufacturing.

54          See Notifying Party's reply to Request for Information N. 3 of 15 September 2015.

55          Pre-transaction, Altera and Intel signed a foundry agreement with […]. See Annex 39 to the Form  CO.

56          See Annex 29 and Annex 30 to the Form CO.

57          See non-horizontal Guidelines, paragraph 18.

58          See non-horizontal Guidelines, paragraph 29.

59          See non-horizontal Guidelines, paragraph 30.

60          In particular, Intel's contract manufacturing agreement with Achronix concerns the access to Intel's 22 nm process technology. […].

61          Form CO, paragraph 441.

62          IBS, Global system IC industry service report, Dec. 2014, Table 2.

63          See https://forums.xilinx.com/t5/Xcell-Daily-Blog/TSMC-and-Xilinx-collaborate-on-7nm-process- technology-and/ba-p/630642.

64          See Jessica Lipsky, TSMC Outlines 16nm, 10nm Plans, EETimes.com, 8 April 2015, available at http://www.eetimes.com/document.asp?doc id=1326286.

65          GlobalFoundries, Global Foundries Solidifies 14nm FinFET Design Infrastructure for Next- Generation Chip Designs, 2 June 2015, available at http://globalfoundries.com/newsroom/press- releases/2015/06/02/globalfoundries-solidifies-14nm-finfet-design-infrastructure-for-next-generation- chip-designs.

66          Currently, Altera purchases the majority of its chips from […]; some of Altera's products are manufactured by [...] and […].

67          See Intel's presentation, "Project alphabet – Preliminary due diligence" of 22 March 2015. See Notifying Party's reply to Request for Information, N.1 – First part of reply, question 31 of 3 July 2015.

68          On the potential effect of the proposed transaction as regards the integration of FPGAs and CPUs, see section 5.4 below.

69          See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 5.

70          See non-horizontal Guidelines – paragraph 99

71          Companies testing this solution (based on PCIe) include large cloud service providers such as Microsoft and Baidu. Apart from workload acceleration in data centre servers, there seems to be no demand or testing of integrating CPUs with FPGAs.

72          PCIe is a high-speed serial computer expansion interconnect used to connect expansion cards to the motherboard of a computer.

73          KTI is the name used during the development phase, while UPI is the commercial name of the very same technology.

74          Notably, Intel's CPU product used in servers called "Xeon".

75          Fair Reasonable And Non-Discriminatory.

76          […].

77          The proposed transaction was publicly announced on 1 June 2015.

78          The merger agreement ("Agreement and Plan of Merger") was signed on 31 May 2015.

79          In particular, according to Intel […].

80          […].

81          See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 47.1.

82          See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 51.1.

83          See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 33.

84          See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 34

85          See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 34.2.

86          Replies to question 41

87          Replies to question 41.1

88          See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 41.1.

89          Replies to question 44

90          See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 35.

91          See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 41.1.

92          The Commission notes that, although the table has been provided by Intel, the parameters listed correspond to a large extent to the parameters listed by other market participants as key parameters  for comparison of the respective interconnect technologies.

93                A higher protocol efficiency means that bigger strings of data can be transported and that they have less overheads (identifiers that are not part of the actual data being transported)

94                The cost estimates are based on recent bids that Intel received for purchases of QPI-attached FPGAs, both configured with the same Altera FPGA. The bids were for small quantities. the prices can thus not be compared to prices that a vendor would quote for much larger quantities.

95          The Commission notes that this does not mean that acceleration solutions based on PCIe 4.0 will be available as of 2016. FPGA suppliers will first have to develop their technologies on the basis of this standard.

96          The QPI licence between Intel and […] which became effective in […] has an initial term until […]. The initial term of the QPI licence between Intel and […], which became effective in […]. At present, the agreement can be terminated within the applicable notice periods by both sides, provided the applicable conditions are met. The Commission also notes that the KTI licences offered by Intel to […] would run for a period of […] years upon signature by […] respectively.

97          According to one respondent to the market investigation Intel could do so by refusing to grant a licence to proprietary extensions to the PCIe standards that enable users to access certain functions of Intel's CPUs (see replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 45.1).

98          […].

99          This corresponds to less than [0-5]% of Intel's projected sales for CPUs used in servers in the same time period. Intel submits that more recent estimates expect a slightly higher demand, but that, even if the number were to be doubled, it would still not amount to more than [0-5]% of Intel's expected CPU sales in the same period of time.

100        See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 35.1.

101        See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 51.

102        See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 50

103        Based on the data provided by Intel, Altera's overall FPGA sales amounted to approximately EUR

1.23 billion in 2014. […]% in terms of value would thus correspond to EUR […] million (see reply to question 1 of Intel's reply to the RFI dated 1 October 2015).

104        See also paragraphs (163) and (172).

105        See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, questions 48 and 49.

106        A CPU manufacturer raised concerns that the proposed transaction would leave Xilinx as the only remaining source of FPGAs, even if Altera were to continue to sell FPGAs to third parties. That competitor explains that CPU designers need to share extensive confidential information about their designs with FPGA vendors. Sharing such information with Intel "would create unacceptable risks, which means that following the Proposed Transaction, [the CPU manufacturer] and other CPU designers will be unwilling to use the combined Intel/Altera as a supplier of FPGAs. Having Xilinx as the sole feasible supplier would likely result in increased costs and decreased innovation, and will deprive [the CPU manufacturer] of the ability to dual source FPGAs to ensure continuity and reliability of supply". See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 50.1

107        See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 36

108        See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 26

109        See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 36

110        See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, questions 25 and 25.1

111        See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 25.2

112        See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 40

113        In particular, capacity does not seem to be a constraint in the present case as most semiconductor companies, […], rely on fabs for the production of their products and, as long as the overall demand for FPGAs does not increase, FPGA suppliers and their manufacturing partners would be able to accommodate a shift in demand.

114        See https://www.qualcomm.com/news/releases/2015/10/08/qualcomm-and-xilinx-collaborate-deliver- industry-leading-heterogeneous and https://forums.xilinx.com/t5/Xcell-Daily-Blog/Qualcomm-and- Xilinx-Collaborate-to-Deliver-Industry-Leading/ba-p/659168 .

115        Data for 2014, source: Form CO.

116        See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, questions 48 and 49.

117        See replies to Commission questionnaire to customers and competitors Q1 of 9 September 2015, question 51.